Fpga ethernet voltage levels

[Altera_Forum]

Hey everybody, 

 I am transmitting ONLY from the FPGA without PHY chip ( are implemented the basic PHY functions on the FPGA ), also i am using isolation ( transformer ).  The fpga Cyclone I has 3.3volts output voltage level on the medium of the Ethernet Interface.   Do you think i will have any issues because of the too high for the ethernet 3.3Volts? What can i do?  Thank you very much :) Giannis

[Altera_Forum]

10BASE-T is in fact sending a digital level from the PHY output to the filter, so it can be emulated by logic gates. You should have series resistors to match the line impedance, so the output level is already halved and isn't much above nominal ethernet send level. You need about 100 - 200 mV sensitivity on receive, however.

[Altera_Forum]

So in 2-3 words, i have to drop the voltage levels from 3.3volts ~~ 1.6volts. Can i use simple voltage divider or i will have a problem? 

 Thnx

[Altera_Forum]

Using impedance matching resistors already creates a 1:1 divider. If you want to lower the voltage further, use a divider instead of series resistors. It should have 50 ohm single ended/ 100 ohm differential output impedance towards the filter/transformer. 

 I don't see a problem. It's basically the same technique used for 3R LVDS resistor networks.