Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16606 Discussions

array initialisation

Altera_Forum
Honored Contributor II
‎05-06-2010 06:39 PM
1,133 Views

HI, ive been trying to reset an array using the following lines: 

 

type array_t is array (0 to 60) of integer;  

signal array_n : array_t:= ((others=> (others=>'0'))); 

 

but i get the following error: 

 

Error (10514): VHDL aggregate error at graph_2.vhd(24): can't determine type of aggregate -- found 0 possible types 

 

 

 

 

please somebody help... 

 

Kind Regards
0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎05-06-2010 07:10 PM
388 Views

Integer isn't a logic_vector, although it's represented by it in synthesis. 

 

Simply write array_t:=(others=> 0)
0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎05-06-2010 07:23 PM
388 Views

Thank you very much FvM, it worked :D 

 

Regards
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.