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Subscription Edition VS Web Edition of Quartus

Altera_Forum
Honored Contributor II
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For my application, i plane to work with Quartus web Edition, but i have readed that the subscribtion Edition has more option. I don't know if this option are necessary for my application (image Fusion of 2 sensors). 

 

What are you think? 

 

 

Thanks
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Altera_Forum
Honored Contributor II
433 Views

 

--- Quote Start ---  

For my application, i plane to work with Quartus web Edition, but i have readed that the subscribtion Edition has more option. I don't know if this option are necessary for my application (image Fusion of 2 sensors). 

 

What are you think? 

 

 

Thanks 

--- Quote End ---  

 

 

Hi, 

 

have a look into this pdf: http://www.altera.com/literature/po/ss_quartussevswe.pdf 

 

Kind regards 

 

GPK
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Altera_Forum
Honored Contributor II
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You should have no problem, assuming you're using a supported device, and dont want to use any Altera IP (like a FFT filter for the fusion). 

 

Are you planning on writing the fusion algorithm yourself?
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Altera_Forum
Honored Contributor II
433 Views

 

--- Quote Start ---  

You should have no problem, assuming you're using a supported device, and dont want to use any Altera IP (like a FFT filter for the fusion). 

 

Are you planning on writing the fusion algorithm yourself? 

--- Quote End ---  

 

 

Thanks Tricky for your Answer, i have wrote an algorithm fusion in c for a mikrocontroller, now i would try to do the same in verilog for the FPGA.
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Altera_Forum
Honored Contributor II
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I advise you to stay away from Verilog. 

Use SystemVerilog instead, it is well supported by Quartus and a LOT easier to learn than Verilog.
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Altera_Forum
Honored Contributor II
433 Views

 

--- Quote Start ---  

I advise you to stay away from Verilog. 

Use SystemVerilog instead, it is well supported by Quartus and a LOT easier to learn than Verilog. 

--- Quote End ---  

 

 

Thank you amilcar, but i have some file in verilog that defines ports of my Board and i would use this file. That 's the reasion why i prefer to work with verilog. 

 

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