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(* keep = 1 *) wire rx_bar_hit/* synthesis keep */;
assign rx_bar_hit = (rx_desc | rx_desc) ? 1'b1 : 1'b0;
But I can't add this signal to Siganl Tap.
Critical Warning: Can't connect pre-synthesis signal "top_example_chaining_pipen1b:core|altpcierd_example_app_chaining:app|altpcierd_cdma_app_icm:chaining_dma_arb|artem_dma:artem_dma0|rx_bar_hit" to port "trigger_in" on SignalTap II instance "auto_signaltap_0" because the signal does not exist in the pre-synthesis netlis
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--- Quote Start ---
(* keep = 1 *) wire rx_bar_hit/* synthesis keep */;
assign rx_bar_hit = (rx_desc | rx_desc) ? 1'b1 : 1'b0;
But I can't add this signal to Siganl Tap. If I add this signal manualy (just type this name in signal tap): Critical Warning: Can't connect pre-synthesis signal "top_example_chaining_pipen1b:core|altpcierd_example_app_chaining:app|altpcierd_cdma_app_icm:chaining_dma_arb|artem_dma:artem_dma0|rx_bar_hit" to port "trigger_in" on SignalTap II instance "auto_signaltap_0" because the signal does not exist in the pre-synthesis netlis
--- Quote End --- Hi, which setting did you use in the node finder ? Post-Fitting ?? Which Quartus version do you use ? Kind regards GPK
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--- Quote Start --- Hi, which setting did you use in the node finder ? Post-Fitting ?? Which Quartus version do you use ? Kind regards GPK --- Quote End --- Hello. I'm try all settings. No one can find rx_bar_hit. Q9.1 Linux 64bit.
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--- Quote Start --- Hello. I'm try all settings. No one can find rx_bar_hit. Q9.1 Linux 64bit. --- Quote End --- Hi, strange, at least "All Names" should show the signal. Did you try wildcards like rx_bar* ? Kind regards GPK
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--- Quote Start --- Hi, strange, at least "All Names" should show the signal. Did you try wildcards like rx_bar* ? GPK --- Quote End --- Yes, "Design Entry (all names)" don't show this signal. Even if I make (* noprune *) (* keep = 1 *) wire rx_bar_hit;
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--- Quote Start --- Yes, "Design Entry (all names)" don't show this signal. Even if I make (* noprune *) (* keep = 1 *) wire rx_bar_hit; --- Quote End --- Hi, did you get a warning like this : "object "rx_bar_hit" assigned a value but never read" ? That means the signal "rx_bar_hit" is not used in your design and it looks like that it is removed regardless of your "keep" assignment. I assume "keep" will only work in order to prevent the signal to be removed by the synthesis engine. BTW: "noprune" works only for reg ! in case they have no fan out. Kind regards GPK
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--- Quote Start --- Hi, did you get a warning like this : "object "rx_bar_hit" assigned a value but never read" ? That means the signal "rx_bar_hit" is not used in your design and it looks like that it --- Quote End --- Yes. I'm not use this wire yet. But I'm expected that wire will be used by Signal Tap. --- Quote Start --- is removed regardless of your "keep" assignment. I assume "keep" will only work in order to prevent the signal to be removed by the synthesis engine. BTW: "noprune" works only for reg ! in case they have no fan out. --- Quote End --- So, there are no way to make wire only for Signal Tap?
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--- Quote Start --- Yes. I'm not use this wire yet. But I'm expected that wire will be used by Signal Tap. So, there are no way to make wire only for Signal Tap? --- Quote End --- Hi, it looks like that, but you can try to capture the wire signal with a register and preserve the register with "noprune". Kind regards GPK
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--- Quote Start --- Hi, it looks like that, but you can try to capture the wire signal with a register and preserve the register with "noprune". Kind regards GPK --- Quote End --- Hi, I looked into the Quartus Help and found this restriction for "keep": "You cannot use this synthesis attribute for nodes that have no fan-out."
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--- Quote Start --- Hi, it looks like that, but you can try to capture the wire signal with a register and preserve the register with "noprune". Kind regards GPK --- Quote End --- --- Quote Start --- (* keep = 1 *) wire rx_bar_hit; (* noprune *)reg rx_bar_hit_reg; always @ (posedge clk_in) begin rx_bar_hit_reg <= rx_bar_hit; end --- Quote End --- Worked. Thanks for all.
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you can also route those signals to outside pins, to leds for instance.
a colegue of mine suggested me to XOR all signals that i want to debug and route result to LEDs.
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