Has anyone used the FMC connector pins on the Arria 10 development board in a design ?? They use both LVDS and High Speed Differential I/O Standards. Even from the basic "golden_top" project file downloaded from the Altera site, with nothing edited, the compilation fails at the fitting stage due to it requiring "too many pins".
I then took out everything in the design file that I didn't need to isolate the FMC connector and reduce the amount of pins and still received errors.
The error I got was:
Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below:
Error(184016): There were not enough differential input pin locations available (1 location affected)
Info(175029): pin containing PIN_G11. Already placed at this location: pin fmcb_la_rx_p[7]
Info(175015): The I/O pad fmcb_la_rx_p[7] is constrained to the location PIN_G11 due to: User Location Constraints (PIN_G11)
Info(14709): The constrained I/O pad is contained within this pin
Info(175015): The I/O pad fmcb_la_rx_n[7] is constrained to the location PIN_G12 due to: User Location Constraints (PIN_G12)
Info(14709): The constrained I/O pad is contained within this pin
There were 64 instances of this error.
Does anyone know the resolution to this error? This is on a Quartus project file straight from the Altera site, before I even use my proposed design.
I am using Quartus version 16.1.
