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Hello,
i am new to Altera and would need help regarding a task. i want to implement SVPWM on an FPGA it goes like this... ANALOGUE SIGNAL----->ADC(SPI)----->FPGA----->SVPWM i am actually stuck at the fpga part....as im figuring difficulties to convert a single phase into 3 phases which are 60degree apart from each other. i have already tried using 3 adc's each fed with a analogue signal of different phase but thts is not svpwm. plz help.Link Copied
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Why you need ANALOGUE SIGNAL? You can make 3 sin signals with 120 degree. And use any type of "analogue signal" just as feedback. For control amplitude or frequency.
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The 3 sin signals can be generated by using 3 look up tables with pre-calculated sin values.
To control the output frequency, all you need to do is to control the speed of the address sequencer (basically a counter)- Mark as New
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--- Quote Start --- Why you need ANALOGUE SIGNAL? You can make 3 sin signals with 120 degree. And use any type of "analogue signal" just as feedback. For control amplitude or frequency. --- Quote End --- analogue signal is part of the task. but that is not an issue...the prob is the svpwm implementation on an fpga. can you explain me in detail what you meant by make 3 sin signals......... --- Quote Start --- The 3 sin signals can be generated by using 3 look up tables with pre-calculated sin values. To control the output frequency, all you need to do is to control the speed of the address sequencer (basically a counter) --- Quote End --- can you please explain me what you have typed in as its still very unclear to me.
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you can use any kind of script language to calculate a sin(x) table. Someting like:
This is pseudo matlab code: for i = [0:0,1:360] printf("%f\n",sin(i)) end Then store that in a .mif file. Take a look at http://www.alteraforum.com/forum/showthread.php?t=23628&highlight=matlab+mif to see how to do that. After that you can initialize the contents of a RAM inside the FPGA with the values you just pre-calculated. Now just do a counter that counts from 0 to 3600. Use the output of that counter as an address for the ram. The data output of the ram will be a perfect digital sine wave. Now you can use three RAMs instead of one and that will give you your 120º phase shift. By controlling the speed of the counter you can control the frequency of the 3 generated sine waves. You can control the quantization error/precision by using more or less bits in the RAM. You can control the sine wave distortion by using more or less addresses. And be careful, your FPGA has a limited amount of RAM.- Mark as New
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thnx alot i will try the above method...but one thing..this wont be SVPWM right. so still the mai task remains there.
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