FLASH programming M29W640FB

[Altera_Forum]

I am developing a method of programming FLASH in order to help production. 

the device is an AMD M29W640FB (8 MByte device). Initially I used the 'Nios FLASH programmer' but it was not able to flash this device. I then created a 'host' file system with the appropriate files stored there and developed my own flashing code in 'C'. This path worked however it takes 4 1/2 minutes per MegaByte to flash. I have 5 megabytes to download & over 20 minutes is unacceptable in a production environment.   I am back at looking at why the Nios FLASH programmer is not working... At first glance it seems as though the programmer is using an incorrect algorithm.   anyone have any suggestions?   joed

[Altera_Forum]

As long as you can read out CFI table, the Flash programmer should work. 

Try typing nios2-flash-programmer -D -b 0xyourFlashBaseAddress It should read the table. If not, you might want to check your FPGA design or hardware design.

[Altera_Forum]

Thanks 

that command worked.  the system has always been able to read the CFI table. I have compared what is read from the table with what the  chip specification says is actually in the chip and they match.   here is my script: nios2-flash-programmer --device=2 --instance=0 --debug --sidp=0x02821038  --id=0x71d36849 --base=0x00000000 --width=8 --program ./flash/dir.flash   The system had trouble erasing three 8KByte sectors - I had to invoke the script three times before all sectors were erased. Then the system appeared to 'test' the writtability of the flash and reported the following: Program sequence:  Write address 0x00000000 <= 0xF0  Write address 0x0000AAAA <= 0xAA  Write address 0x00005555 <= 0x55  Write address 0x0000000F <= 0x25  Write address 0x0000000F <= 0x00  Write address 0x0000000F <= 0x30  Write address 0x00000000 <= 0x29  Read address 0x0000000F => 0xFF Program failed at offset F Leaving target processor paused /****/ It appears as though location 0xFF is still in the erased state. So the write to that location did not work. additionally the addressing seems incorrect. the algorithm writes 0xAA to location 0x0000AAAA // then 0x55 to location 0x00005555 // then writes  0x25 to location 0x0000000F //   in the specification for this chip it indicates the algorithm should be: write: 0xAA to location 0x00000AAA // then 0x55 to location 0x00000555 /then wirte <the intended data> to location <the intended address>   you see - the Nios2 programmer is writting to the incorrect location.