waiting for clock ?!

[Altera_Forum]

Hello, I am using signal-tap to investigate a problem. 

But currently the problem is signalTap itself. I have a trigger clock (100 Mhz), which I am sure its running, otherwise nothing would run on the FPGA but a PC, which is connected to that FPGA board is receiving the data..this means that the clock must run The strange thing is that Signal-Tap displays that he is waiting for the clock. So this means that S.T. doesnt see any clock transitionon the trigger clock  I am only using signals from the presynthesis  Does anybody else here has already encountered the same kind of problem ?  Could it be a JTAG connection problem ? But flashing the FPGA is working fine and S.T. doesn't report any bad JTAG connection

[Altera_Forum]

--- Quote Start ---  Hello, I am using signal-tap to investigate a problem. But currently the problem is signalTap itself. I have a trigger clock (100 Mhz), which I am sure its running, otherwise nothing would run on the FPGA but a PC, which is connected to that FPGA board is receiving the data..this means that the clock must run The strange thing is that Signal-Tap displays that he is waiting for the clock. So this means that S.T. doesnt see any clock transitionon the trigger clock  I am only using signals from the presynthesis  Does anybody else here has already encountered the same kind of problem ?  Could it be a JTAG connection problem ? But flashing the FPGA is working fine and S.T. doesn't report any bad JTAG connection  --- Quote End ---    Hi,  did you get any warning during compilation that your clock node isn't found ? When you open the stp-file is the clock node dispalyed in red colour ?  Kind regards  GPK

[Altera_Forum]

--- Quote Start ---  Hi,  did you get any warning during compilation that your clock node isn't found ? When you open the stp-file is the clock node dispalyed in red colour ?  Kind regards  GPK  --- Quote End ---    no they're displayed in black and I dont see any warning. this is a really strange behaviour.  I have used S.T. really often in the past, but this is also new for me

[Altera_Forum]

--- Quote Start ---  no they're displayed in black and I dont see any warning. this is a really strange behaviour.  I have used S.T. really often in the past, but this is also new for me  --- Quote End ---    Hi,  I only run into this problem when the selected node was removed or renamed by Quartus, but then the node was dispalyed in red colour. Did you change the Quartus version ?  Kind regards  GPK

[Altera_Forum]

If I remember right, the only reason why I get this message was a clock, that has been actually stopped.

[Altera_Forum]

I solved the problem when I use post-fitting signals instead of pre-synthesis signals. Hmm strange..formerly it was always working with pre-synthesis signals