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Systemverilog packed structs in Quartus II?

Altera_Forum
Honored Contributor II
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Re-posting here from the general forum where I posted by accident . . . 

 

I have a systemverilog header file (types.svh) that contains a number of the following: 

 

typedef struct packed { 

bit [127:0] field1; 

bit [63:0] field2; 

bit [127:0] field3; 

bit [63:0] field4; 

 

} name_of_struct; 

 

When I try to synthsize it in a file: 

 

`include "types.svh" 

 

module mod_name(i_port, ...) 

 

input name_of_struct i_port; 

 

 

Quartus II just dumps out a bunch of errors saying "Verilog HDL error: object "name_of_struct" is not declared. It's like QuartusII isn't actually seeing my `include file or something. Any suggestions?  

 

If I include the struct declaration prior to the 'input . . . ' line in my code, it works fine, so there is something about declaring a struct in an external file that is broken. I can't believe Quartus wouldn't support such a basic feature though.
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Altera_Forum
Honored Contributor II
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It works provided that you comply to this restriction: 

 

The path to the include file has to be explicitely writen in your system verilog file. For example: `include "../include/types.svh".
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