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I2C loopback on Max II

Altera_Forum
Honored Contributor II
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Hi, 

 

I'm trying to figure out a way to do a I2C loopback test. How do I handle the bidirectional data, without actually implementing the logic of reading the R/W* bit on the address sent out? I know which is the master & which is the slave ahead of time. 

 

In essence, I guess, is there way to synthesize a bidirectional buffer? 

 

appreciate your help.
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Altera_Forum
Honored Contributor II
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I don't exactly undertand what an i2c loopback test is. But I doubt, that you can operate an I2C interface without evaluating the direction information, respectively the adressing and read/write state. 

 

A digital bidirectional buffer, e.g. a HC245 device, can't work without DIR control. Special I2C buffers are either utilizing analog bus swiches or an analog direction sense detector, both aren't available with CPLD or FPGA.
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Altera_Forum
Honored Contributor II
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basically, testing two I2C ports on a device.. connecting them together in a CPLD & configuring one as master & other as slave on the device. Of course, I am testing other features as well using the CPLD. This is just a part of it. 

 

Thanks
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Altera_Forum
Honored Contributor II
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Use an external bus switch.

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Altera_Forum
Honored Contributor II
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The whole point of the CPLD is to reduce external components.. so I'm guessing from your replies, I will need a GPIO into the CPLD to tell me when data direction switches..

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Altera_Forum
Honored Contributor II
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I will need a GPIO into the CPLD to tell me when data direction switches 

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Yes, if you where you get it.
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