MegaWizard RAM wont send data from address 0

[Altera_Forum]

hello, im having troubles reading data from megawizard's dual port ram (address 0 in particularly)  

heres what ive done so far: *initialized ram's contents to numbers incerementing by 1 (30h, 31h... which is the ascii of 0,1...) *feeding the ram with a proper clock (100MHz derived from an oscillator) *reading its contents and displaying it on a LCD, results are: ||,1,2,3...   using signaltap ive found that the ram wont give any data for address 0 (meaning ram data output remains all 0's, when it should be 30h), ive tried connecting its read_address signal to all 0's, still getting the same results even though its beeing fed by a proper clock input im not using a read_enable input am i doing something wrong?   for the record i am currently starting the reading process from address 1, everything works fine this way.  thanks in advance, IdanP

[Altera_Forum]

Did you use a MIF to initialize the RAM? Or do you write a stream of data into the RAM by logic? 

In the first case inspect the MIF. In the second case it will be in the logic. Can you post/copy the code?

[Altera_Forum]

--- Quote Start ---  Did you use a MIF to initialize the RAM? Or do you write a stream of data into the RAM by logic? In the first case inspect the MIF. In the second case it will be in the logic. Can you post/copy the code?  --- Quote End ---   i used a MIF file, checked it just to make sure it has my desired data for several times, all other addresses other than 0 sends data that matches the MIF

[Altera_Forum]

Can you tell which device and speed grade you are using? I'll generate a small design to study the problem. Or perhaps attach a .qar of your project?

[Altera_Forum]

--- Quote Start ---  Can you tell which device and speed grade you are using? I'll generate a small design to study the problem. Or perhaps attach a .qar of your project?  --- Quote End ---    yes, EP3C55F484I7 imma go look for that .qar now

[Altera_Forum]

I made a little project, see attached .qar, and couldn't see any problem (as expected). I'm using Quartus II 9.1SP2 together with the internal simulator.

[Altera_Forum]

i see.. can you suggest anything that could cause this problem? 

can i upload any files that will be of any use to you? regarding the .qar, parden my ignorance im kind of new at this, how can i create one and what are its contents? thanks again

[Altera_Forum]

A .qar is an archive from a project containing all necessary files to re-compile the project. You make an archive by: Project-> Archive Project

[Altera_Forum]

attached the .qar file 

please let me know if you find anything thank you

[Altera_Forum]

You left the wren open on your RAM-block, and it seems that is taken as a '1'. This overwrites the data at address '00h' immediately with '00h', and the expected '30h' will only be there for one single clock. Instead of using signaltap you could have simulated your design, and you would have noticed the 30h to 00h transition in your LCD data directly after startup.

[Altera_Forum]

--- Quote Start ---  You left the wren open on your RAM-block, and it seems that is taken as a '1'. This overwrites the data at address '00h' immediately with '00h', and the expected '30h' will only be there for one single clock. Instead of using signaltap you could have simulated your design, and you would have noticed the 30h to 00h transition in your LCD data directly after startup.  --- Quote End ---   thank you imma go fix it now unfortunately im not familiar with many of quartus' features, never used its simulator, i usually either use signaltap or build a test bench and simulate using modelsim (i dont know of a way to simulate megawizard blocks therefore only used signaltap). any useful self study material in your opinion (such as pdf's/books regarding debugging/design) would be highly appriciated =] thanks again