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What is the minimum input voltage Ripple required for the cyclone II FPGA voltage of 1.2V and 3.3V. The spec is not given in the datasheet.
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Do you mean the maximum allowed ripple of the supply voltage of the FPGA?
Do you refer to the ripple visible on the output pin of the FPGA? Can you explain better?- Mark as New
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--- Quote Start --- The spec is not given in the datasheet. --- Quote End --- I think it's well defined. Simply assume, that the instantaneous voltage has to keep the specified operation conditions, about +/- 4% for VCCINT. In addition, for devices without voltage regulator for analog PLL supply, a lower high frequency ripple may be required for stable PLL operation. This applies e.g. for Cyclone II VCCA. Pay attention to the VCCA bypass and filter recommendations.
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