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hello, i wanted to whether adding byteenable signals to your sopc costum components is a must do. im working on a small system, interfacing my slave components to the main cpu's masters, i havent made any other master components and im still getting a warning for missing byteenables (will result in spurios writes...)
another thing is, im getting the "downloading elf process failed" error while trying to debug my nios project, found this pdf on google explaining how to fix it: http://www.altera.com/literature/rn/rn_nios2eds.pdf im kind of new at this, i have connected my sram's memories to the nios component, am i doing something wrong? (pdf says connect cpu.data_master to all program memories) thanks in advanceLink Copied
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Your slave needs to be a 32bit slave, otherwise the SOPC builder will silently add a bus width adapter and then do multiple slave cycles for each Nios master cycle.
Even with a 32bit slave you should look at the byte enables, since if you ever connect the the PCIe bridge you'll discover it always generates two 32bit cycles - even when one of them has all the byte enables inactive (surely Altera could modify the bus width adapter to avoid such cycles?).- Mark as New
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i see, thanks imma try that
what about the "downloading elf process failed" error im getting trying to debug?
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