Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Flashing binary file directly to on-chip

Altera_Forum
Honored Contributor II
‎11-17-2010 05:05 AM
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Scheduled for removal

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Altera_Forum
Honored Contributor II
‎11-17-2010 06:32 AM
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The Quartus programmer isn't designed to perform general JTAG boundary scan tasks (although it would be a nice feature). Lookout for tools like TopJTAG http://www.topjtag.com/flash-programmer/

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Altera_Forum
Honored Contributor II
‎11-17-2010 05:51 PM
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I didn't use the tool, but I guess, you may need the BSDL description file, that shows the assignment of indidvidual IO pins to the boundary scan JTAG chain. It can be downloaded from Altera.

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Altera_Forum
Honored Contributor II
‎11-18-2010 10:44 AM
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It wants to know which pins of the EPM 3064a is connected to the flash chips CE, WE , OE ,A0> a31 and D0 > D31 pins. 

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Your questions are very unclear. You didn't mention before, that you are dealing with a hardware which circuit is apparently unknown. This problem hasn't anything to do with Altera CPLDs or programming tools.
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