- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi all,
when I'm designing a simple mux: assign cmp_b = sel_ab1 ? (n+1'b1) : a; where N = 2 I got this warning: "Warning (10230): Verilog HDL assignment warning at determining_pivot_DU.v(69): truncated value with size 32 to match size of target (4)" What can I do in order to eliminate this warning? Thanks in advance, ty6Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I presume cmp_b and a are 32 bits wide.
Change the adder to match 32bits: assign cmp_b = sel_ab1 ? (N+32'h00000001) : a; You may need to modify N width, too.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Nope, cmp_b and a are 4 bits, but I define N as below:
parameter N = 2; should I redefine as: parameter N = 4'b0010 ? Thanks ty6- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- should I redefine as: parameter N = 4'b0010 ? --- Quote End --- Right. Then: assign cmp_b = sel_ab1 ? (N+4'b0001) : a; However these type of warnings are usually not a problem, provided you are aware of the size mismatch and its implications. The compiler will truncate extra bits or pad with zero when missing (i.e. your "+ 1'b1" assignment on a 4bit value would be automatically converted into "+ 4'b0000") Regards
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page