Problem with using external DDR2 on DE3

FPGA, SoC, And CPLD Boards And Kits

FPGA Evaluation and Development Kits

Problem with using external DDR2 on DE3

887 Views

Hi all,

I have a DE3 from Terasic, and my purpose is to store some data into the DDR2 and get it back after some while. But I am quite confused about the high performance DDR2 controller.

1. If SOPC is used, how can I write/read the data into the DDR2?Is it Okay if I just assign some values to all the signal listed, for instance,mem_dqs? (we assume the data is already inside the FPGA)

2. If we use the megawizard, could anyone show me some more detailed process?(the document feels kind of blured...)

I would really appreciate if anyone can help.

Thanks!

Link Copied

0 Replies

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.