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Good day.
I am using the Stratix III development board. I have a Altera Data Conversion Card (HSMC) that I want to use to test ADC/DAC functionality. I don't really know where to start? (well its connected to the STRATIX III) Is there any documentation or examples of megacore functions that go well with this HSMC? If anyone has any tips or hints I would appreciateLink Copied
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I assume you are referring to this board:
http://www.altera.com/literature/manual/rm_data_conversion_hsmc.pdf I did not look for example code, but I am sure there are Altera application notes that could be reimplemented for this board. The first things I would do are; 1) ADC test * capture ADC samples using DDR I/O registers and then write data to FPGA RAM 2) DAC test * read data from FPGA RAM send it using DDR I/O to the DAC Test the dynamic range of the ADC using a sinusoid or noise source from an external generator with better than 14-bits. If you don't have something like that, then you can use the 14-bit DAC, but you won't be able to tell with the DAC is the limiting factor for the signal-to-noise or the ADC. Read the following for ADC test procedures: http://www.ovro.caltech.edu/~dwh/carma_board/digitizer_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/digitizer_tests.pdf) and the following for some digital signal processing ideas http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-320paper_hawkins.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-320paper_hawkins.pdf) Cheers, Dave- Mark as New
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Thanx Dave,
I started with some ADC/DAC examples that I got. But I am definitely going to use your advise. Thanx for the documents *** well!- Mark as New
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Hi RoelofBurger,
I have just stepped in to use Data Conversion Card with Altera Cyclone III 3C120. Now in the same stage that you've been before; Trying to test ADC/DAC functionality. So my question is very similar. Have you got any documentation or mega functions to be used with NIOS II? If so can you share with me. Thanks- Mark as New
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--- Quote Start --- I have just stepped in to use Data Conversion Card with Altera Cyclone III 3C120. Now in the same stage that you've been before; Trying to test ADC/DAC functionality. So my question is very similar. Have you got any documentation or mega functions to be used with NIOS II? If so can you share with me. --- Quote End --- Here's another document with some tests in it you can repeat: http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf You don't need NIOS II to test ADCs/DACs. In fact a NIOS processor is not really any use. What you need is a data generator and data capture RAM. Cheers, Dave
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Thanks Dave for the prompted reply.
I'm trying to implement a wireless communication link. And the baseband processing is planned to be done with the Cyclone III development board with a NIOS II processor. So it would be of great help, if I can use already existing mega functions for accessing ADC/DAC channels within NIOS II. Do you have any documentation on any library written for accessing ADC/DAC channels? Thanks, Cham- Mark as New
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--- Quote Start --- Do you have any documentation on any library written for accessing ADC/DAC channels? --- Quote End --- There is no 'accessing' of ADC/DAC channels. You create data streams (samples) to send to DACs and you receive samples from ADCs. You create Avalon-ST (streaming) components to feed samples to DACs, and you can treat an ADC data stream as an Avalon-ST source (that has no backpressure). The only thing a NIOS II processor can do when dealing with high-speed (high-data rate) devices like DACs (or ADCs), is setup packets in memory that are then consumed (or produced) by the Avalon-ST streams that ultimately connect to the ADCs/DACs. Before trying to create a wireless communication link in an FPGA, you first need to understand how to create one in a tool like MATLAB. Then you will have a better understanding of data (samples) flow. Cheers, Dave
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