Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16596 Discussions

What is the ds_MISO signal in my SPI?

Altera_Forum
Honored Contributor II
1,273 Views

Hi, 

 

I've implemented several SPI (Alter IP) interfaces in several SOPC systems. 

 

Today, I made another one and this time I found an additional port that I don't know about. It is called ds_MISO (see attachment) and I found nothing in the documentation about it. 

 

The funny thing is that the settings are exactly the same like in an other project where this extra port does not appear. I double checked the settings and can't see any differences. 

 

Can somebody please tell me what is going on here? 

 

Thanks, 

Maik
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
315 Views

i've seen this before, as i recall you can comment out the 2 lines containing ds_MISO in the generated HDL. i think it was fixed in later versions (which are you using?)

0 Kudos
Altera_Forum
Honored Contributor II
315 Views

Hi, 

 

thanks for your answer. So it is basically a bug, right? 

 

My Quartus version you can find in the attachment (9.1 SP 2). 

 

The funny thing is, that I use this Quartus Version for quiet a time now and never had this bug to appear. 

 

Maik
0 Kudos
Altera_Forum
Honored Contributor II
315 Views

yes, its a bug. i think it was supposed to be fixed in 10.0 

 

it is strange that it seems to occur randomly
0 Kudos
Reply