3.372 MHz and 7.5Mhz and 4Khz

[Altera_Forum]

I need to generate clock for 3.372 Mhz, 7.5 MHz and 4 Khz. is this possible using dividers in the dE0 or the DE0 nano board?

[Altera_Forum]

since nobody answers you. 

you can craete 4KHz from 64MHz divided by 16.  also, you can create 7.5MHz from 50MHz.  I have a question. do you really need to create "exact" 3.372 MHz from 50MHz? I tried creating 3.372 from 50MHz I could create 3.371993MHz instead of that. is that enough for you?

[Altera_Forum]

Yes that will work wonderfully...  

I have never used any clock dividers yet, is there a reference page or a help you can guide me to?  And also, i can run 64 Mhz clock and 50 Mhz clock on the same board right? Coz i need to generate a pulses of 3.372 Mhz and 7.5 MHz, both repeating itself at 4 KHz  So i can just add another clock to the board?

[Altera_Forum]

all right, I will help you as far as you and I can. 

 first of all. if you know how to generate Altera's IP-Megacorefunction. if you do that. just read the document here http://www.altera.com/literature/ug/ug_altpll.pdf  and generate IP-core  Start QuartusII  -> select [Tools]-> [MegaWizardPluginManager]menu  -> create a new custom megafunction  -> select ALTPLL in I/O tab  in the IP-Megafunction you can choose input clock(50MHz in DE0 nano) and output clocks ( what you want create)  this is rough description. if you have the board. just try it and check it out with an oscilloscope.

[Altera_Forum]

Hi, 

I dont have the DE0 nano board yet, but i have DE2-70  and using that the megafunction only lets me create a clock at 9.3750 MHz from a 50 MHz source

[Altera_Forum]

Would it be possible to generate these signals using the DE2 board?

[Altera_Forum]

Its possible to generate something close to these frequencies using a 50MHz oscillator (I assume that is what the DE0 has). 

 The standard way of generating slower output clocks is to divide the clock using a counter, eg. 50MHz/4kHz = 12500, so use a down counter loaded with 12499, and use the carry-out as a 4kHz pulse. If you want a 4kHz square wave, then load a downcounter with 12500/2 - 1 = 6249, and use the carry-out to toggle a signal.  The other frequencies are not simple divisions. So in that case, you can implement something analogous to a numerically controlled oscillator. The NCO is clocked at 50MHz. Note that this NCO generates a square-wave output, rather than a sinusoid; there is no sine ROM, you use accumulator output directly. Its the analogy with an NCO that helps you understand this technique.  For example, for 3.372MHz, the frequency tuning word is 50MHz/3.372MHz = 14.873, i.e., for every 50MHz clock, the NCO accumulator has 14.873 added to it. How do you do this in integer? You think in fractional-integer format. Lets say your accumulator has an 8-bit fractional part, then 50MHz/3.372MHz x 2^8 = 3795.9668 ~ 3796 (ED4h). This number in binary is 1110_1101_0100b, and in fractional integer format 1110.1101_0100, which is equivalent to 3796/256 = 14.828125. You can use this along with an accumulator to create (on average) a 50MHz/14.828125 = 3.37197MHz waveform. If this is not close enough, try a larger fractional component.  The accumulator technique divides the clock by 14 the first time, and saves the 0.828125 fraction, and adds 14.828125 to that to get 15.65625, so next divides the clock by 15, and saves the fraction 0.65625 and adds 14.828125 to that to get 15.484375, so next divides the clock by 15, etc etc. The 50MHz clock is divided by 14 or 15 multiple times, so that 'on average' the output clock is 3.372MHz.  If this is a homework problem, then I don't want to give you the complete solution. This should put you on the right track to solving it though.  Cheers, Dave