Need help with squential circuits!

[Altera_Forum]

Hi guys please help with this question : 

 Write a VHDL program to implement a 4-bit Parallel-Out Serial Shift Register. The 4-bit shift register features AND-gated serial inputs and an asynchronous clear and preset. The gated serial inputs a and b permit complete control over incoming data. A low on either input inhibits entry of the new data and resets the first flip-flop to low at the next clock pulse. A high input enables the other input, which will then determine the state of the first flip-flop. Clocking occurs on the low-to-high transition of the clock input. The following shows the symbolic representation of the device and its truth table. Write testbench to verify your code. Use configuration specification for component binding.  Cheers :)

[Altera_Forum]

What problems are you having?

[Altera_Forum]

I don't get what the question wants me to do :confused:

[Altera_Forum]

What he means is that we won't make your homework for you. Try to solve the problem by yourself, and then if you have specific questions or a specific problem you can't solve by yourself, come back and ask here. 

The only good way to learn VHDL is by doing this kind of stuff yourself ;)