Newbie - direction prod needed

[Altera_Forum]

Hi, 

 Firstly, please excuse my lack of knowledge in this area...   I have been playing around with some CPLD's and FPGA's and have done some basic logic designs which work well.   Now i want to design somethign a little more complex but am a little overwhelmed with my selections and was hoping someone might be able to give me some pointers   I would like to create a FPGA device which:   A) Has 2 UART's (both 1200baud) B) Has a SPI Slave interface C) Has an internal FIFO for the UART D) Is memory mapped via the SPI Slave interface   Now, i havent done anything with any kind of memory yes so am a little hazy on the individual components needed.   I have found the memory mapped slave interface, and the UART, and the internal memory components   I would like the UARTS to recieve data and store it in the fifo memory or main memory in a way i can collect it from the SPI port   I would like to write to the SPI port the data i want to transmit via the UARTS   I am having some issues getting this all in the QSys designer, and maybe do not fully understand the abilities of each component   Am i able to get the memory mapped SPI slave to this autimatically using just addresses or will i need to implement DMA, so i create some UART fifos, and DMA the data to the SPI memory mapped area?   Could i do this job without a Nios core? so it all just clocks away like a logic circuit?   Is there a similar example available anywhere which i might be able to adapt?   and lastly, how do i know what product is best suited for this kind of design? I currently have a MAX EPM7128 dev board but i dont think it will support these IP blocks, could someone suggest a minimum alternative?   Many thanks for any help,   Billy

[Altera_Forum]

Nios2 isnt needed but it's recommended 

You probably need a DMA to transfer the data Cyclone is the low-cost FPGA and it should fufill your needs

[Altera_Forum]

--- Quote Start ---  Nios2 isnt needed but it's recommended You probably need a DMA to transfer the data Cyclone is the low-cost FPGA and it should fufill your needs  --- Quote End ---       Many thanks   Cyclone starter kit on the way!   Could you explain why the Nios2 isnt needed but recommended? would it just be a lot simpler to achieve my goal goind down thew Nios core route?   So i have setup a    A Uart SPI_Slave_To_Avalon_Master onchip_memory onchip_fifo and DMA   So i guess a little code in the Nios core to check if anything is in the fifo, if there is, then move it to the SPI memory mapped area   or   Use the Nios2 to setup the DMA to automatically move that data?   Does anyone know of any examples i could study for this?   Many thanks   Billy