Cyclone III Active Serial Problem

[Altera_Forum]

I'm having a problem when I use Active Serial mode to configure a Cyclone III EP3C25Q240. I've used this part in another design using Passive Serial configuration, and I did not encounter any of these problems. As far as I know AS/PS is the biggest difference between the two designs. 

 I have three different voltages connected to the FPGA: 1.2V and 2.5V as required by the core and PLLs, and 3.3V for all I/O.   My design uses one clock input, and it is driven at 40 MHz. If I disable the clock during configuration, things seem to go ok. If the clock is running during configuration, bad things happen. For some reason the FPGA is sucking down the 3.3V I/O supply. I haven't measured the current, but the switching regulator supposedly won't fold back until 800+ mA.   When the 3.3V is being sucked down, the 1.2V and 2.5V both maintain good and clean levels. The 1.2V and 2.5V use the same type of regulator as the 3.3V, just with different programming resistors.   My clock oscillator has an active-high output enable, so my work-around for now is to connect the output enable to the FPGA's CONF_DONE output. CONF_DONE goes low during configuration, which disables the clock output.   That work-around seems to take care of things during AS configuration, but I still sometimes have the same trouble when I try to use JTAG configuration, even with the work-around installed.   There is very little else on the board, and what little there is has their output enables pulled high, so there shouldn't be any external bus contention causing the power problem. Also, the FPGA is the only thing driven by that clock.   Why would the I/O supply get sucked down, and not the core and pll supplies? Why is there a problem at all?   Has anybody ever seen anything similar?

[Altera_Forum]

I've never seen that kind of problem before... How is your clock signal? Are there any significant overshoot/undershoot? The Cyclone III is rather picky with overshoots when using 3.3V I/O, but still it shouldn't cause that kind of defect. Are you sure that it really takes the 3.3V down and that it isn't a measurement problem (induced by overshoots on 3.3V clock that would end up on the supply line?).