Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Pin planner Assignment Editor

Altera_Forum
Honored Contributor II
‎09-14-2011 06:24 PM
1,237 Views

Dear Gurus, 

 

Is it possible to make an assignment like this? 

group these six LVDS signals and put them on the same bank 

 

 

PS: I do not want to select the bank myself. I want the tool to find the same bank for them.
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Altera_Forum
Honored Contributor II
‎09-15-2011 02:44 PM
421 Views

Be more clear

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Altera_Forum
Honored Contributor II
‎09-15-2011 03:48 PM
421 Views

TO_BE_DONE

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Altera_Forum
Honored Contributor II
‎09-16-2011 09:14 AM
421 Views

I don't think that's possible, other than generating a random number in the script and use this one as the bank. Is there any reason why you can't pick a bank number yourself?

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Altera_Forum
Honored Contributor II
‎09-16-2011 09:22 AM
421 Views

Dear Daixiwen 

 

Because  

-I am deserializing 6 data channels with their own clocks(6 different clock sources) 

-I am receiving PLL compensation errors without any constaint (I have 8 plls in the device) 

I want to use the inteligence of the tool for the best performance
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