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(Ignoring logic polarity issues) Is it electrically valid to cross connect LVDS signals between Stratix III FPGAs? The reason for doing this is that we made a piggy back modification board to add some missing connections and because the board is single sided we can only cross- connect the LVDS pairs i.e. TX(p) to RX(n) and TX(n) to RX(p).
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Yes this is electrically valid. You should length match the p/n traces for each differential pair.
Cheers,
Dave
