matlab to verilog converter request

[Altera_Forum]

Hi there, 

 Is there a compiler which can convert Matlab code directly in to VHDL/verilog format so to implement the code directly in to FPGA? I have written codes on MATLAB and would like to convert the code in to verilog format so to make my life easier.:)   me w8ting for your response!!!! thnks

[Altera_Forum]

--- Quote Start ---  Hi there,  Is there a compiler which can convert Matlab code directly in to VHDL/verilog format so to implement the code directly in to FPGA? I have written codes on MATLAB and would like to convert the code in to verilog format so to make my life easier.:)   me w8ting for your response!!!! thnks  --- Quote End ---    Did you try the MATLAB site?  http://www.mathworks.com/products/slhdlcoder/index.html  http://www.mathworks.com/products/filterhdl/  These converters are for very specific logic implementations.  There will not be a general-purpose m-file to HDL converter.   If you want an optimal hardware implementation, you are better off writing HDL, and using the MATLAB model for comparison testing.  Cheers, Dave

[Altera_Forum]

HDL coder is more a simulink tool and only a subset of embeded m can be converted.

[Altera_Forum]

Almost any higher level language to verilog/vhdl conversion will not give you optimal results, except for very basic implementations. The problem is the C/Matlab/ etc. languages do not have hardware constructs, so the conversion is forced to basically generate a flat unrolled design that ends up taking more resources and running slower than the desired operation. 

 In one case I worked on, a software engineer tried to use a C->Verilog converter to generate code for image warping. The C code worked, but was too slow. (Taking several seconds to warp a signal 800x480 frame). She worked with an FAE for over 4 months trying to convert the algorithm to a hardware implementation. The net result was they could never get it to fit in the target device.  I took the software and was able to generate a pretty small design that could do the warping at 20->30 pfs. (with 15 fps being the target update rate).

[Altera_Forum]

matlab code converted to VHDL? sound interesting. :)

[Altera_Forum]

Altera's DSP Builder Advanced blockset for Simulink should be mentioned here. it doesn't convert M code, but the HDL it outputs is generally very efficient

[Altera_Forum]

u thnx a lot... 

also i want to guide me in my project which is ''fpga imlementation of linear discriminant analysis for p300 signal detection''... plz guide me

[Altera_Forum]

u thnx a lot... 

also i want to guide me in my project which is ''fpga imlementation of linear discriminant analysis for p300 signal detection''... plz guide me...