Nios® V/II Embedded Design Suite (EDS)
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Verified OK - Leaving target processor paused

Altera_Forum
Honored Contributor II
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I have got a problem when running Nios, here is my problem: 

 

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 

Pausing target processor: OK 

Initializing CPU cache (if present) 

OK 

 

Downloading 00008000 ( 0%) 

Downloaded 19KB in 0.3s (63.3KB/s) 

 

Verifying 00008000 ( 0%) 

Verified OK  

Leaving target processor paused 

 

I have read some comments by similar stuffs, but there was no any solutions for this ? Can anybody show me what this problem is ? Since it reported no error but the result was nothing. 

 

I highly appreciate any comments from you. 

 

DucKhai.
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Altera_Forum
Honored Contributor II
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How do you download the .elf file to the Nios? If using the command line you need to add the -g option to start the CPU after download. If you are using a GUI there may be a box to tick to do that.

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Altera_Forum
Honored Contributor II
287 Views

This could be a pin assignment issue. Ensure that clk and reset are connected to the respective pins in the board. 

 

For DE4, I found that assigning clk to pin OSC_50_B7 (50 Mhz clk input for Bank 7c 1.8v pin A19) worked.  

 

Also, I think the frequency of clk input from board must match frequency in SOPC builder (50MHz usually) unless you are using an exclusive PLL
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