A question in megacore simulation with Modelsim

[Altera_Forum]

I generated a PCI-E IP with megacore PCI-E compiler. Along with the IP, QuartusII offers a testbench for simulation. I tried to simulate the testbench with Modelsim6.0c (a separate version). Here is the problem: the verilog files include a lot of global parameters as "parameter [7:0] RP_PRI_BUS_NUM = 8'h00 ;". The Modelsim seems not to support the global parameters. 

 I tried to replace the parameters with "`define", but the mount is big. I think QuartusII should support modelsim very well. There must be a trick to solve it easily. Could anybody tell me? Or should I change to the altera version of modelsim?    Thanks.

[Altera_Forum]

--- Quote Start ---   I generated a PCI-E IP with megacore PCI-E compiler. Along with the IP, QuartusII offers a testbench for simulation. I tried to simulate the testbench with Modelsim6.0c (a separate version)  --- Quote End ---    Which version of Quartus?  Its important to use *exactly* the same version of Modelsim as the Altera Starter Edition. I have had troubles using a newer version of Modelsim-SE with Quartus libraries. So, start by trying a consistent version of Modelsim (or try Modelsim Altera Starter Edition).  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  Which version of Quartus?   Its important to use *exactly* the same version of Modelsim as the Altera Starter Edition. I have had troubles using a newer version of Modelsim-SE with Quartus libraries. So, start by trying a consistent version of Modelsim (or try Modelsim Altera Starter Edition).   Cheers, Dave  --- Quote End ---     My quartusII version is 11.0. I'm afraid that the problem in this case is not related to the Quartus libraries compatibility. It is a syntax error.    I will try modelsim-altera ase later. But the ASE version has a limitation on the size of simulation codes. It may not solve my problem.   Any other solutions?

[Altera_Forum]

--- Quote Start ---  My quartusII version is 11.0. I'm afraid that the problem in this case is not related to the Quartus libraries compatibility.     --- Quote End ---    Modelsim 6.0c is ancient. Quartus 11.0 ships with 6.6d, and 11.1 ships with a 10.x version (I forget which). Start by trying the Altera edition. I've never run into the code size limits when debugging and testing individual components of a design, and that is pretty much all you need to check to determine if this is a modelsim issue or quartus generation issue.  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  Modelsim 6.0c is ancient. Quartus 11.0 ships with 6.6d, and 11.1 ships with a 10.x version (I forget which). Start by trying the Altera edition. I've never run into the code size limits when debugging and testing individual components of a design, and that is pretty much all you need to check to determine if this is a modelsim issue or quartus generation issue.   Cheers, Dave  --- Quote End ---     Dave, Thanks for info.    I have tried Modelsim ase 6.6d. But the modelsim gave errors: "Global declarations are illegal in Verilog 2001 syntax". So Modelsim ase doesn't support the code generated by QuartusII megawizard. That sounds weird. What tool should be used for simulation with these codes?   Any solution to that??

[Altera_Forum]

--- Quote Start ---   I have tried Modelsim ase 6.6d. But the modelsim gave errors: "Global declarations are illegal in Verilog 2001 syntax".    --- Quote End ---  Try vlog -sv? Or Compile->Compile Options, Verilog&System Verilog tab, Check the SystemVerilog checkbox.  If that fails, post an example and I can try it in Modelsim-SE.  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  Try vlog -sv? Or Compile->Compile Options, Verilog&System Verilog tab, Check the SystemVerilog checkbox.   If that fails, post an example and I can try it in Modelsim-SE.   Cheers, Dave  --- Quote End ---     I have solved the problem. It is easy. Just running the "runtb.do" coming with the megacore testbench. Now everything is OK. (For Modelsim SE, it may generate loading error due to the option “-noimmedca”. Just remove that option.)   I guess the reason why it gave syntax errors is because I added all files to the project and compiled them. (Not wise. Some files are just parts of some modules, which should be used by "`included".) Don't take pain to do that. It will make a lot of trouble.    Thanks.

[Altera_Forum]

--- Quote Start ---  I have solved the problem. It is easy. Just running the "runtb.do" coming with the megacore testbench.   --- Quote End ---  Why did you not just try that first? :)  I find most of the Tcl .do files produced by the Quartus tool are pretty ugly. However, its good to start with a working testbench script, and then edit until it matches your own personal perception of beauty.  I'm glad to hear you figured it out.  Cheers, Dave