Avalon-ST data width adapter

[Altera_Forum]

I'm trying to locate an existing Avalon-ST adapter that will throw away unused bits. 

 Since I generate data from the Nios, I have a 32-bit fixed-width MM-to-ST FIFO. I only need 10 bits in my custom component with an ST sink. Without modifying my ST interface to send the MSBs to the bit bucket, can I simply insert an Avalon-ST adapter to do this for me?

[Altera_Forum]

Why do You need that? Use 32bit buses and leave the unused bits as they are. The synthesizer will take care of this.

[Altera_Forum]

This may be true, but I'd prefer to have more direct control over the synthesis results. Maybe I just need more experience with the compiler before trusting it's output to do the right thing. 

 The Avalon-ST Data Format Adapter appears to do what I want. I just need to set the "Data Bits per Symbol" to 2 and the "Data Symbols per Beat" to 16 and 5 for input and output, respectively. Am I missing something, or is this a reasonable usage of the adapter component?

[Altera_Forum]

this link (http://quartushelp.altera.com/current/mergedprojects/system/sopc/sopc_about_sys_interconnect.htm) shows an example, but there's some ambiguity about what's happening in the mux. I couldn't locate any better documentation for the Data Format Adapter.

[Altera_Forum]

Read the Avalon-ST bus docu, but I am pretty sure it does what You want. It probably instantiates a dual-port ram with mixed widths (basically it will be DCFIFO I suppose).

[Altera_Forum]

There is an ST data adapter but it's not going to do what you want. It does things like take a 32-bit input containing 4 symbols (bytes) and converts it down to an 8-bit output (four beats of a single symbol at a time). 

 Instead what you need is a custom core that has a 32-bit sink, and a 10-bit source that truncates the bits away for you. Alternatively you can just do this at the input of the next core in the ST chain assuming you wrote the core and can modify it.  So no there is no adapter available for doing this but it's dirt simple to create one. If you want to see an example take a look at any of the designs for the NEEK and look at the video pipeline. There will be a core that takes 32-bit RGBA and outputs RGB with the A channel ripped out.