Error: Input port must be driven by a non-inverted input pin or another PLL

Altera_Forum · ‎12-13-2011

Hi,everyone.

I used a PLL to generate the special clock,after coplilation,an error occured:Error: Clock input port inclk[0] of PLL "d5m_pll" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control block.

The code listed:

sys_pll d5m_pll(

.areset(1'b0),

.inclk0(OSC_50_BANK2_in),

.c0(),

.c2(D5M_XCLKIN),//24M

.locked()

);

OSC_50_BANK2_in is a clock source.

Please tell me how the problem occured and how to solve it,thank you very much。

Altera_Forum · ‎12-13-2011

I'm guessing OSC_50_BANK2_in is assigned to a pin that isn't a dedicated clock input location. Look in the Pin Planner.

Altera_Forum · ‎12-15-2011

Thank you，I will check again.

Altera_Forum · ‎12-15-2011

You are right.I didn't assign to the clock.Thank you very much.