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FPGA configuration via Protocol (CvP)

Altera_Forum
Honored Contributor II
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Hello,  

 

The Altera white paper WP-01132-1.1, section "Design Example Support", page 12, states there is a Linux based C application program design example (part of Altera vendor open source source) for FPGA configuration via Protocol. Does anyone know where this program is located? 

 

Thanks! 

Daniel
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Altera_Forum
Honored Contributor II
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i received the CvP demo after filing an SR

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Altera_Forum
Honored Contributor II
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Thank you, thepancake. 

 

Hope you don't mind a few follow-up questions. When did you submit the SR and how long did it take to receive the demo code? Was it Linux based? I filed the Service Request 10850616 since 02/17/2012 and I am still waiting. Is it possible that you put the demo code on some place that I can go to get a copy? I've started to work on the FPGA image using CvP and the availability of Altera vendor open source code would make a positive impact on my development schedule by not re-inventing the wheel. 

 

Daniel 

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Altera_Forum
Honored Contributor II
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there is some documentation, patches for Windows and Linux, and some C code. it uses the Jungo drivers 

 

that's a while without a response. try and reference 11SP2_CvP_Deliverables.zip
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Altera_Forum
Honored Contributor II
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Do you mean to reference 11SP2_CvP_Deliverables.zip to the SR? 

 

Would you be willing to email it to me or put in my company public FTP site?
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Altera_Forum
Honored Contributor II
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I got the file. Thanks! Your help is much appreciated.

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Altera_Forum
Honored Contributor II
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Hi thepancake, 

 

I've had problems to program the FPGA fabric image. I use the driver from 11SP2_CvP_Deliverables.zip and replace the Jungo driver fucntions with Linux pci_read_config_byte, pci_write_config_byte, pci_write_config_dword API. 

 

CvP mechanism works intermittently on my Stratix V ES Development Kit and does not work at all on my Stratix V GX prototype (FPGA registers are read back all 1's). The CvP Initialization and Update mode is set. Altera tech support states that their official driver program will be available at the release of Quartus II v12 at late May 2012. 

 

I'd appreciate to hear if the driver works for you and whether you had to make modifications. 

 

Daniel
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Altera_Forum
Honored Contributor II
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i've not gotten that far :(

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Altera_Forum
Honored Contributor II
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I am experiencing the same thing. After loading the image via CVP I read back all 1's. I need to do a warm boot in windows 7 and then the registers are initialized correctly. Did you (has anyone) ever get cvp to function properly? If so what did you do? Upgrading to Quartus V12 did not help. 

 

Thanks
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Altera_Forum
Honored Contributor II
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Hi, 

 

could someone send me the zip file? 

 

Thanks 

Ben
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Altera_Forum
Honored Contributor II
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Hello, would someone be so kind and send me the zip as well?

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Altera_Forum
Honored Contributor II
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For a helpful overview of CvP and how to create a working design, see the attachment. 

 

This should help give answers on where the driver files are, how to create an example design, and how to debug CvP issues that come up.
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