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altera_attribute for regional_clock

Altera_Forum
Honored Contributor II
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I am using a PLL and want to make sure (in VHDL) that the outputs of the PLL go to regional clock networks. Due to the PLL being an IP I can not add attributes to the rtl of the PLL. Thus I try to add an attribute to the Port in the top level. When using the signal name "clkPwm", my attribute is ignored. When trying to use the port name "pwmclkpll:u2|outclk_0" I have to move the attribute behind the port map. There it causes a syntax error. When trying to use the port name "pwmclkpll|outclk_0" get syntax error due to the |. It works when inserted to the qsf file. But I want to use the attribute to have everything relevant in the same file. Here is the relevant part of my VDHL: entity de0_nano_hardware is end de0_nano_hardware; architecture RTL of de0_nano_hardware is component pwmclkpll is port( refclk : in std_logic; -- refclk.clk rst : in std_logic; -- reset.reset outclk_0 : out std_logic; -- outclk0.clk outclk_1 : out std_logic; -- outclk1.clk outclk_2 : out std_logic; -- outclk2.clk locked : out std_logic ); end component pwmclkpll; signal clk : std_logic; signal reset : std_logic; signal clkPllPwmLocked : std_logic; signal clkPwmSlow : std_logic; signal clkPwm : std_logic; signal clkPwm2 : std_logic; attribute altera_attribute : string; -- this attribute is ignored attribute altera_attribute of clkPwm : signal is "-name GLOBAL_SIGNAL ""REGIONAL_CLOCK"""; begin u2 : pwmclkpll port map( refclk => clk, rst => reset, outclk_0 => clkPwm, outclk_1 => clkPwm2, outclk_2 => clkPwmSlow, locked => clkPllPwmLocked ); end RTL;

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Altera_Forum
Honored Contributor II
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The recognised way to do this is, as you've found, in the .qsf. Adding '|' symbols into your rtl files is going to cause issues. 

 

See Altera's "how do i assign a clock in my design to use specific global, regional, dual-regional, or periphery clock networks? (https://www.altera.com/support/support-resources/knowledge-base/solutions/rd09282011_171.html)" support solution. 

 

Cheers, 

Alex
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Altera_Forum
Honored Contributor II
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Yes, manually edit your .qsf or use the Global Signal assignment in the Assignment Editor.

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