Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16556 Discussions

ModelSim Altera SDF problem

Altera_Forum
Honored Contributor II
2,864 Views

Hi! 

I'm a beginner to the world of Simualtion:) 

I have a prblem with my ModelSim-Altera 6.6d (Quartus II 11.0sp1) Starter Edition: 

I compiled a project in ModelSim-Altera successfuly and my design i want to simulate is designed for a cycloneii FPGA. 

My project in ModelSim-Altera contains a .vo file and a top.v as a testbench. After compiling i click on simulate->start simulation... when the windows pops up, I select my top.v design (I had to add the cycloneii library, otherwise it gives me a long list of errors) then i do [OK]. 

The Transcript window shows an error now: 

# Compile of DE1_Default.vo was successful.# Compile of top.v was successful.# 2 compiles, 0 failed with no errors. vsim -L C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii work.punchARM# vsim -L C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii work.punchARM # Loading work.punchARM# Loading work.pancham# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_lcell_comb# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_lcell_ff# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_io# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_mux21# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_dffe# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_asynch_io# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_clkctrl# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_mux41# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.cycloneii_ena_reg# ** Error: (vsim-SDF-3894) DE1_Default_v.sdo: Compiled SDF file was not found.# Loading C:/altera/11.0sp1/modelsim_ase/altera/verilog/cycloneii.CYCLONEII_PRIM_DFFE# ** Error: (vsim-7) Failed to open SDF file "DE1_Default_v.sdo" in read mode.# No such file or directory. (errno = ENOENT)# ** Error: (vsim-SDF-3445) Failed to parse SDF file "DE1_Default_v.sdo".# Time: 0 ps Iteration: 0 Region: /punchARM File: C:/FPGA/punchARM/testbench/top.v# Error loading design  

 

(DE1_Default is the project name) 

What did I do wrong? I also added my testbench (top.v) in quartusii simulation settings, where i selected "compile test bench". 

Please can you help me and remember that I'm a beginner!
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
1,565 Views

I "solved" the problem: 

I just searched for the DE1_Default_v.sdo file, copied and pasted it in all the folders I can find around my project. It works now and the simulation can be loaded because it finds the file now, but it's actually not a nice way to solve this problem...
0 Kudos
Altera_Forum
Honored Contributor II
1,565 Views

allright,do not use default sdo files. it is important to take it from your project's folder each time you recompile it; sdo file is actually sdf. quartus compiles it, renames it to sdo and places into your quartus project->simulation->modelsim folder. now when you create your modelsim project elsewhere and simulate it, the modelsim project file somehow finds the correct sdo. 

but in time, when you re-launch modelsim simulation it may loose sight of sdo file that was located into your quartus project. i have tried to give address to it, in modelsim there is an option SDF address. i have added the address to sdo file but it didnt work. i guess modelsim project file (.mpf) somehow remembered that sdo file MUST be located into modelsim project's main folder. so; either you copy sdo file from your quartus project/simulation/modelsim to your modelsim project main folder; and it will work fine (but in that case you will have to manually recopy each time you recompile quartus project). OR! you create your modelsim project into yourquartusproject/simulation/modelsim folder. in that case you wont have to copy anything.
0 Kudos
Altera_Forum
Honored Contributor II
1,565 Views

I found that "(sdfcomp-7) failed to open sdf file “whatever.sdo” in read mode is most likely caused by the files residing on a UNC path" 

 

See [source (http://www.coertvonk.com/technology/logic/quartus-cycloneiv-ne0nano-15932#beforeyoustart)] 

 

 

--- Quote Start ---  

The simulator doesn’t play well with UNC paths (e.g. network shares). It triggers numerous errors and may cause timing simulations to disregard the delays. Keeping the files on the server is fine, for as long as you access them through a symbolic link. Change to your home directory (cd %USERPROFILE%) and create a symbolic link to your file server (mklink /d symlink \\server\service\path). 

--- Quote End ---  

0 Kudos
Reply