Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

nios ii help

Altera_Forum
Honored Contributor II
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hi... 

 

i have altera cyclone II development board and i am new to it... 

 

I'm posting my post into 4 parts so as to add a hyperlink to my post
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Altera_Forum
Honored Contributor II
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i am able to successfully run the ethernet testing code from the de2_net demo cd

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Altera_Forum
Honored Contributor II
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I came across a UDP hardware implementation using cyclone II

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Altera_Forum
Honored Contributor II
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The below link has the complete information of the source code;

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Altera_Forum
Honored Contributor II
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https://courses.cit.cornell.edu/ece576/finalprojects/f2007/mjk64_hmm32_jdp45/mjk64_hmm32_jdp45/index.html 

 

i see from the above link that they have used de2_net from the demo cd for basic ethernet connection ,no information is given about ptf and qpf files, i copied their verilog files to de2_net project and compiled without error but i am unable to build their c files from nios II IDE. 

 

please help... 

thanks in advance...
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Altera_Forum
Honored Contributor II
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I had a quick read on the article, and it looks like there are a few things missing, especially the Sopc builder/QSys project with the Nios CPU and the interfaces to all the custom components. Have you tried contacting the authors?

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