Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Trouble with EPCS pin assignments in Quartus II 11.0

Altera_Forum
Honored Contributor II
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I am using an EPCS16 to configure a Cyclone III EP3C25Q240 and configuration works fine. 

However, I also want to use the EPCS16 for Remote Update, which requires that I connect the EPCS signals to the epcs_controller component of my Qsys design in Quartus II. When I do this I get the following error message from the QII compiler: 

 

 

error: cannot place i/o pin epcs_data with i/o standard 3.3-v lvcmos in pin location 24 -- possible switch coupling with i/o pin epcs_dclk in pin location 23. 

 

 

This is nonsense of course since the pins I am using are the correct ones for the EP3C25Q240, and the serial configuration works. 

 

How can I convince Quartus II to allow this pin configuration without generating an error?
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Altera_Forum
Honored Contributor II
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I remember previous "nonsense" errors related to EPCS pins. I guess, in this case assigning 0 MHz toggle rate to the DCLK pin in pin planner or assignment editor will help.

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Altera_Forum
Honored Contributor II
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That did the trick, my design now compiles and I can program the EPCS through JTAG. I haven't tried it with Remote Update yet, but hopefully that will work too. 

 

Thanks FvM for the quick reply. Saved me countless hours. :)
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