arria V FPP programing doesn't work

Altera_Forum · ‎02-07-2017

hi,

I have a problem trying to program my arria V using a CPLD.

I am using a compressed rbf file and the MSEL pins are set as needed "10110" for compressed file with FPP x8 bit programming scheme.

the Dclk to Data Ratio is 2 and the Dclk freq is 25MHz.

I toggle the nConfig and receive an Ack from the nStatus however the conf_done never rises and no error is reported on the nStatus (remains high).

Is there a known issue with using this configuration scheme in arria V device ?

Can someone suggests me with a debugging possibility?

thanks

It drives me crazy !!!!:cry:

Altera_Forum · ‎02-07-2017

Without going into the hardware, did you set the type of programming you were going to use in the Device & Pin Options settings in Quartus before generating the programming files?

Altera_Forum · ‎02-08-2017

thank you for the comment

yes the programming file is generated according to the scheme. (compressed, fppx8)

Altera_Forum · ‎03-07-2017

hi,

an update the programming is working now.

there was a mismatch in the qsf pins.

the data bus pins weren't in the correct order