flash memory integration with Nios II in qsys

[Altera_Forum]

hi, 

I want to implement a system which have nios 2 processor on chip is to communicate with the on board flash(cfi) memory (not a compact flash). i dont know how to integrate with nios2 and axi bus by using Qsys . By reading several documents i noticed few terms ie., 1. serial flash ,parallel flash ..... i think they are using in USB .  2. implementing with try state bridges .  3. implementing with flash programmer & Instantiating Flash Memory. 4. EPCS flash memory . Waht is epcs flash , can i use as a common flash?    in Qsys tool library we have only compact flash and EPCS flash memories. I am getting confusion any one can help me please    with adv thanx manju540

[Altera_Forum]

I'll try to answer to some of your questions, 

 Parallel flash devices expose address and data ports and you access data directly by writing the target address and wr/rd the data word Conversely, serial flash are accessed through a serial port interface (usually SPI) with a specific protocol: this allows a minimal pin count (independent from address range and data width) at the expense of a slower access speed and a bulkier sw driver.  CFI stands for Common Flash Interface: this is a standardized specification and it is widely used for parallel flash. CF stands for Compact Flash and is used for a class of removable memory cards; the interface is parallel; they must not be confused with SD cards which rely on a serial interface. EPCS is a particular serial flash memory supplied by Altera; its way of operation is very similar to other serial flash devices, like ST M25Pxx series.  Tristate bus allows sharing the bus among more devices: they are connected in parallel and only one of them at a time can drive data, the others being tristated, i.e. not driving the signal lines. The Altera tristate bridge provides a connection between the internal Avalon bus and a generic tristate bus, so it's required to connect to a CFI flash device.