DE2: how to use clock divider?

Altera_Forum · ‎09-04-2012

Hello,

I was coding clock divider in VHDL and was told that it's not a good idea to do so. How do I use the DE2's onboard clock divider?

Thank You

Altera_Forum · ‎09-04-2012

Instead of using a clock divider, use a clock enable instead. It will keep your system in the same clock-domain and make the timing behavior easier to determine by Timequest.


IF (rising_edge(CLOCK)) THEN
  IF (clock_enable_s = '1') THEN
    --Stuff Here
  END IF;
END IF;

Just pulse the enable when you want an operation to be done and it should behave much like a clock division.

Hope this helps.

Altera_Forum · ‎09-04-2012

Learned how to use the megawizard for a PLL. thanks

Altera_Forum · ‎09-04-2012

--- Quote Start ---

Instead of using a clock divider, use a clock enable instead. It will keep your system in the same clock-domain and make the timing behavior easier to determine by Timequest.


IF (rising_edge(CLOCK)) THEN
  IF (clock_enable_s = '1') THEN
    --Stuff Here
  END IF;
END IF;

Just pulse the enable when you want an operation to be done and it should behave much like a clock division.

Hope this helps.

--- Quote End ---

Sorry for my terminology, that's what i would have used. My problem was trying to make a 25.175MHz clock from a 50MHz clock. I have no idea how to do this.

I can see that i'd need to divide by 2.298850574712644 to make that clock.

and i dont think there's any synthesizible way to do that?

Altera_Forum · ‎09-06-2012

any particular reason to set such a non-integer clock rate?

Altera_Forum · ‎10-14-2012

--- Quote Start ---

any particular reason to set such a non-integer clock rate?

--- Quote End ---

it's the clock rate that VGA uses.

Altera_Forum · ‎10-15-2012

if i'm not mistaken there are some example code that I've seen doesn't really use 27.125MHz clock but they just derive VGA clock from the 50MHz clock with counters. precision doesn't really matters.