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Hello. I'm new in the digital hardware world. And i need help.
I'm studding CPLD architecture, with especial interest in max v device. For what i know CPLD is it's a device that have multiple SPLDs, and the SPLDs are interconnected through a programmable interconnection structure, right? But i'm reading the max v handbook and i can't understand what type of SPLDs (PAL or other) the max v have inside. Someone can explain me please? I read the logic element part (it was what i supposed to be the splds) but it seams that it's now the spld elements.Link Copied
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MAXII/ V aren't typical CPLDs; their architecture is similar to FPGAs based on 4 input LUTs, register and a dense interconnect.
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--- Quote Start --- MAXII/ V aren't typical CPLDs; their architecture is similar to FPGAs based on 4 input LUTs, register and a dense interconnect. --- Quote End --- thanks for the reaply. that helped me allot. but made some questions too. if MAX II/V have a similar FPGA architecture why they are still CPLDs? if they have similar architecture, that means that the MAXs have unpredictable propagation times? i believe that don't have Longer propagation times because they have Multitrack. am i wrong?
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I've always understood one of the key differences between CPLDs and FPGAs to be that CPLDs are non-volatile. In other words CPLDs do not require an external configuration device (i.e. external non-volatile memory + controller) to configure them on power up.
Other sources (like wikipedia *wince*) may suggest other distinctions, but as technology advances these distinctions might get blurred. This is the viewpoint I have found helpful when communicating with people in industry. If anyone more knowledgeable wants to instruct us with more precise definitions, please feel free.- Mark as New
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--- Quote Start --- if MAX II/V have a similar FPGA architecture why they are still CPLDs? --- Quote End --- Altera designed them to replace their CPLD products and markets them as such. But it's best if you think about them as a small simple FPGA with integrated flash to hold configuration (and other tidbits if you wish). --- Quote Start --- if they have similar architecture, that means that the MAXs have unpredictable propagation times? i believe that don't have Longer propagation times because they have Multitrack. am i wrong? --- Quote End --- Right on both counts.
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--- Quote Start --- I've always understood one of the key differences between CPLDs and FPGAs to be that CPLDs are non-volatile. In other words CPLDs do not require an external configuration device (i.e. external non-volatile memory + controller) to configure them on power up. --- Quote End --- There are non-volatile FPGAs fom companies such as Actel and Lattice. Xilinx also had a Spartan3 variant with integrated configuration memory.
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--- Quote Start --- There are non-volatile FPGAs fom companies such as Actel and Lattice. Xilinx also had a Spartan3 variant with integrated configuration memory. --- Quote End --- Thanks for the clarification. I guess the point I was trying to make is that often times I hear other engineers refer to non-volatile FPGAs as CPLDs simply because they don't require a configuration device. This generalization may be, at least in part, because of Altera's effort to cast the Max devices as CPLDs.
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