Connecting DDR3 Controller to Chip Pins

[Altera_Forum]

I am trying to code a DDR3 controller and connect its mem* connections to chip pins. 

 i.e. The DDR3 controller IP has input, output, and inout connections that would be connected (using Verilog code) to chip pins that would go to the DDR3 RAMs.  I'll take one set of these, for example the DDR3 controller inout connections named mem_dqs. I connect these inout signals to chip inout pins.  When the design is compiled I get an error that says:  Error (15874): Output port DATAOUT of DDIO_OUT primitive  "DDR3Controller:ddr3Controller|DDR3Controller_0002:ddr3controller_inst|DDR3Controller_p0:p0|DDR3Controller_p0_memphy:umemphy|DDR3Controller_p0_new_io_pads:uio_pads|DDR3Controller_p0_altdqdqs:dq_ddio[7].ubidir_dq_dqs|altdq_dqs2_stratixv_use_shadow_regs:altdq_dqs2_inst|output_path_gen[0].the_ddio_data" must drive input port I of I/O OBUF primitive or input port DATAIN of DELAY_CHAIN primitive.  The reading I've done seems to say that I must connect between DDR3 controller and chip pins using buffers such as are generated using the Megawizard ALTIOBUF, which can be defined as an input, output, or  bidirectional buffer. But connecting a bidirectional buffer seems problematic.  The bidirectional ALTIOBUF has connections: datain, dataout, dataio, and oe. But the DDR3 controller does not have input and output connections. It has inout connections named mem_dqs. The chip also has inout pins to the RAMs. So I don't know how to connect all this. I tried connecting ALTIOBUF dataio connections to chip inout pins, and I connected both the ALTIOBUF datain and dataout connections to the DDR3 controller mem_dq inout pins. I got the error:  Error (12014): Net "mem_dqs_n[6]", which fans out to  "IOBuf8:ioBuf8_mem_dqs_n|datain[6]", cannot be assigned more than one value.  There may also be pin assignments required in the assignment editor. I do have some pin assignments set but only I/O Standard SSTL-135.  Basically I'm looking to see how to connect DDR3 Controller mem_* connections to chip pins so Quartus won't give me an error.  Thank you, Matthew

[Altera_Forum]

You should be able to hook them up directly, i.e. no buffer or anything in between. Regenerate your megafunction and have it generate an example design(it asks after you hit finish the megawizard and click generate). That will create a full project with the DDR3 core instantiated and hooked up to I/O(as well as a pattern generator that tests it). Just look at that example and see what's different.