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Pulse Width Modulation

Altera_Forum
Honored Contributor II
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Dear All, 

This is Reza, Actually my basic field is Power Electrical Engineering but in the University I'm studying I have got involve with FPGA. The Research Topic has been given to me is Pulse With Modulation with FPGA and my board is Cyclone II. Could you please help regarding me. How can I start and how can I find the Verilog or VHDL codes. I need a simple PWM project based on Cyclone II after that I think I will be able to understand the process and go ahead. 

Please kindly help me regarding that. Thank you all.:oops:
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Altera_Forum
Honored Contributor II
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well, learning fpga can be quite beginner-unfriendly. the best is to get your research dept to purchase a development kit and learn it from there. 

 

you might want to get some help from an electronics engineering guy specialized in digital design.
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Altera_Forum
Honored Contributor II
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Thank you jacklsw86, 

 

Actually I have Cyclone II starter development kit and already I got familiar what is it and how it works. 

but now I want do a simple project using PWM, for example changing the brightness of one or some LEDs with using PWM.  

I'm trying to know how can I change the duty cycle on PWM. the Altera website has an Example but it has designed for MAX II and I think there are lot of differences with Cyclone II in source code and pin assignments. 

 

Could you please guide me regarding that.
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Altera_Forum
Honored Contributor II
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if the example is written in vhdl/verilog you can just use it on cyclone II as well. all you need to change are the device settings and pin assignments.

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Altera_Forum
Honored Contributor II
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So now my question: what is wrong with this filter? Did I specify something incorrectly when designing it?

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Altera_Forum
Honored Contributor II
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I found this web site, It seems has explained a simple PWM project.  

http://www.ece301.com/fpga-projects/53-pwm.html 

It has designed base on FPGA spartan 3 Xilinx family but the source code started from line 21. Is it any remaining before that? if is, Professionals please help. 

 

Regrads
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Altera_Forum
Honored Contributor II
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The project is here: 

http://www.ece301.com/fpga-projects/53-pwm.html 

 

Why the source code has started from line 21???? what is the remaining? 

 

thank you
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