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Hi all
To analyse the power consumption of a design. I generated the .vcd file by Turning on the Generate Value Change Dump File script by enabling the run gate level option under EDA tool options. Then mentioned the design name in the design instance name option which is the design instance name in the testbench. The .vcd file is generated under the simulation folder in the project directory. I gave the .vcd file as input to the power analyzer tool in the QUARTUS II with 12.5% toggle rate. After the compilation I observed that the core static thermal power dissipation is always constant with the value of 79.92 mW and the I/O thermal power dissipation value is changing from 30mW. Is it the correct way of analyzing the power for a design. Can anyone please tell me whether there is any other way for power estimation. Can anyone please help me with this... Thanks, PhaniLink Copied
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