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Hello all,
I have PWMs (4) signals and I want to delay the second signal to go high when the first signal goes from high to low in real hardware. I have 4 phases DC-DC buck converter to power 8K Watt. How do I delay the clock in second, third, and fourth signals? I'm be able to shift the phases out equally. Thanks, SeanLink Copied
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--- Quote Start --- Hello all, I have PWMs (4) signals and I want to delay the second signal to go high when the first signal goes from high to low in real hardware. I have 4 phases DC-DC buck converter to power 8K Watt. How do I delay the clock in second, third, and fourth signals? I'm be able to shift the phases out equally. Thanks, Sean --- Quote End --- Why delay clock? if you are just after those patterns then have a fast enough clock and generate those patterns on same one clock.
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sean98007,
Your older threads along the same topic have some good suggestions but maybe leave your question unanswered or not clear enough for you to act upon them. "verilog code about shift phase 0, 90, 180, 270" - http://www.alteraforum.com/forum/showthread.php?t=43082 "Faster Frequency in PWM" - http://www.alteraforum.com/forum/showthread.php?t=43263 If you have tried some things and maybe it is still not clear to you, you could possibly follow up with a descriptions of what you have tried and where you are stuck. I'm mentioning all this because your new thread question of "I want to delay the second signal to go high when the first signal goes from high to low" sounds a lot like your original question of how to shift phase 180 degrees. i.e. you simply need to program your PWM with one output being 180 degrees out of phase of the other. Follow up with maybe some more details of what pieces you've got and what you are missing and more people will follow up with suggestions. Good luck.- Mark as New
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Hello ted,
Thank you for follow my threads. So I'm working the digital PWM to control High and Low of DC-DC asynchronous buck converter. I have 4 powers source DC that I need to phase them out equally so to get full power. I'm be able to get them shift out equally in my design to get 250Khz freq and 1000 steps count. Now, I need to run little delay on the clocks so I can process my next step. Do you have any resource to help me that would be very nice? I'm running right now in the hardware FPGA to control 8K Watt power, but I need to delay the pulse of second, third, and fourth signal. Best, Sean- Mark as New
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I feel like you are maybe asking the same question which FvM answered here:
http://www.alteraforum.com/forum/showthread.php?t=43082&p=178215#post178215 Since you are saying you have 1000 step counts, you may want to do something like: output(0) = turn on at 0, stay high for <pulse_width> output(1) = turn on at 250, stay high for <pulse_width> output(2) = turn on at 500, stay high for <pulse_width> output(3) = turn on at 750, stay high for <pulse_width> If this is not what you want to do, maybe post simulation waveforms that describe what is wrong.- Mark as New
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Ted,
I just got this working now. Sorry, I don't run QuestaSim right now. I want to run in real hardware board. Peace, Sean- Mark as New
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Thats great I'm glad you got it to work.
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