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runtime reconfiguration...

Altera_Forum
Honored Contributor II
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how can we perform runtime reconfiguration in fpga's?

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Altera_Forum
Honored Contributor II
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It depends on what you mean by "run-time reconfiguration" :) 

 

The newer generation Stratix V is supposed to support partial reconfiguration, and the new SoC devices will also have to support some sort of reconfiguration (where the ARM core is alive, and the FPGA fabric, or part of it, is reconfigured). 

 

Older generation parts, eg., Cyclone IV/Stratix IV and earlier do not support partial reconfiguration. However, you can still implement "run-time" reconfiguration by having additional support logic, eg., another FPGA or a processor that is responsible for configuring the FPGAs. For example, many development kits have a USB-Blaster programmer, which consists of a USB interface plus CPLD. That "support logic" is what allows you to configure and reconfigure the FPGA on the kit. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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does cycloneII support this partial reconfiguration.

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Altera_Forum
Honored Contributor II
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does cycloneII support this partial reconfiguration. 

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Let me repeat myself: "Cyclone IV/Stratix IV and earlier do not support partial reconfiguration". :)
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