DDR SDRAM pin assign problem

[Altera_Forum]

Hi, 

 I'm trying to have a pin-assignment of EP3C55U484C7 with DDR SDRAM.  I read the pin information for the Cyclone III EP3C55 device. but after assignment, threre are errors during compilation as "The assigned locatino PIN AB16 for DQ pin "ddr_dq[8]" is not a legal location".  I read a lot of post and datasheet. But I didn't realize what I'm wrong. Please check the attachment which is the pin-assignment file. Please give me some advices.  Thank you for reading.  /* set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[12] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[11] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[10] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[9] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[8] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[7] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[6] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[5] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[4] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[3] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[2] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[1] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_addr[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_ba[1] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_ba[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_cas_n set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_cke[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_clk[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_clk_n[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_cs_n[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dm[1] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dm[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[15] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[14] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[13] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[12] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[11] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[10] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[9] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[8] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[7] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[6] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[5] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[4] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[3] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[2] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[1] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dq[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dqs[1] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_dqs[0] set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_ras_n set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS I" -to ddr_we_n set_location_assignment PIN_AB19 -to ddr_addr[12] set_location_assignment PIN_AA19 -to ddr_addr[11] set_location_assignment PIN_AB17 -to ddr_addr[10] set_location_assignment PIN_AA17 -to ddr_addr[9] set_location_assignment PIN_T14 -to ddr_addr[8] set_location_assignment PIN_T11 -to ddr_addr[7] set_location_assignment PIN_T10 -to ddr_addr[6] set_location_assignment PIN_AA3 -to ddr_addr[4] set_location_assignment PIN_Y4 -to ddr_addr[3] set_location_assignment PIN_U8 -to ddr_addr[2] set_location_assignment PIN_U7 -to ddr_addr[1] set_location_assignment PIN_V6 -to ddr_addr[0] set_location_assignment PIN_AB3 -to ddr_addr[5] set_location_assignment PIN_V7 -to ddr_ba[1] set_location_assignment PIN_W6 -to ddr_ba[0] set_location_assignment PIN_AB6 -to ddr_cas_n set_location_assignment PIN_AA6 -to ddr_cke[0] set_location_assignment PIN_T16 -to ddr_clk[0] set_location_assignment PIN_R16 -to ddr_clk_n[0] set_location_assignment PIN_Y3 -to ddr_cs_n[0] set_location_assignment PIN_AA7 -to ddr_dm[1] set_location_assignment PIN_V5 -to ddr_dm[0] set_location_assignment PIN_AA5 -to ddr_ras_n set_location_assignment PIN_AB5 -to ddr_we_n set_location_assignment PIN_AA20 -to ddr_dq[15] set_location_assignment PIN_W17 -to ddr_dq[14] set_location_assignment PIN_AB18 -to ddr_dq[13] set_location_assignment PIN_T15 -to ddr_dq[12] set_location_assignment PIN_W15 -to ddr_dq[11] set_location_assignment PIN_V15 -to ddr_dq[10] set_location_assignment PIN_V14 -to ddr_dq[9] set_location_assignment PIN_AB16 -to ddr_dq[8] set_location_assignment PIN_U12 -to ddr_dq[7] set_location_assignment PIN_AB15 -to ddr_dq[6] set_location_assignment PIN_AA15 -to ddr_dq[5] set_location_assignment PIN_W13 -to ddr_dq[4] set_location_assignment PIN_AB14 -to ddr_dq[3] set_location_assignment PIN_AA14 -to ddr_dq[2] set_location_assignment PIN_AB13 -to ddr_dq[1] set_location_assignment PIN_AA13 -to ddr_dq[0] set_location_assignment PIN_AB9 -to ddr_dqs[1] set_location_assignment PIN_V10 -to ddr_dqs[0] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dm[1] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dm[0] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[15] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[14] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[13] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[12] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[11] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[10] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[9] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[8] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[7] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[6] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[5] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[4] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[3] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[2] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[1] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dq[0] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dqs[1] set_instance_assignment -name OUTPUT_ENABLE_GROUP 211315428 -to ddr_dqs[0] */

[Altera_Forum]

Now, Compilation is finished successfully. DQs and DM were connected to DQ5B group when compilation was failed.  

I got a successful compilation after I changed DQs and DM into DQ3B group.  But I can't understand the reason why. Anybody knows why?