Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Error: Can not generate netlist output

Altera_Forum
Honored Contributor II
1,611 Views

I'm trying to compile a program, I got this error when I get to final stage EDA netlist writter: 

Error: Can not generate netlist output files Because the license for encrypted file "C :/ Users/Desktop/AN374_IP/AN374_IP/_restored/incremental_db/compiled_partitions/namefile.map.atm" is not available 

 

 

please help me
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Altera_Forum
Honored Contributor II
593 Views

HI, 

Are you using any IP Core? It looks like you are trying to use an IP Core without licence.
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Altera_Forum
Honored Contributor II
593 Views

Hi shikataleonardo  

 

of what license you talking about?? the license quartus?? if I do not license the compilation stops since the beginning
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Altera_Forum
Honored Contributor II
593 Views

License to use de IP Core. Each IP Core has an especific license file to enable the netlist generation. That is what I know. There is the option to evaluate the IP Cores from Altera, but only works with the FPGA conected to the PC.

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Altera_Forum
Honored Contributor II
593 Views

hi 

i resolve the problem but now i have this warning  

 

Warning: Can't generate output files. Specify command-line options to generate output files, or update EDA tool settings using GUI or Tcl script. 

 

 

can you help me pleazzz
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Altera_Forum
Honored Contributor II
593 Views

Go to your project settings, go to the EDA Tool Settings tab, and check that "None" is selected everywhere. You shouldn't need to generate a netlist output in most cases (and if you do, then you'll need to buy the licenses for all the licensed IPs that you are using in your project).

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