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Hello!
I have got fully working design based on Cyclone IV GX and PCI-E 1.0 x1 and using Avalon-ST 64-bit interface from my logic to IP core. All is fine (bus mastering transfers and interrupts), however I have to use BDF (Bus Device Function) as hardcoded constant. Of course, as the result, I'm getting card inoperable in different ports on different computers. I want to get BDF dynamically from PCI-E IP core. There are tl_cfg interface which may provide me needed bus and device numbers, however this code is not working, when I remove constant (initial bdf = 16'h0200) then through Signal Tap I see bdf as 0000. What I doing wrong? Is this correct that I divide core_clk_out when passing to pld_clk? Is there any easier way to get Bus and Device number?reg cfg_clock;
wire cfg_addr;
wire cfg_data;
initial cfg_clock = 0;
pcie_core pcie(
// ...
.pld_clk(cfg_clock),
.tl_cfg_add(cfg_addr),
.tl_cfg_ctl(cfg_data),
// ...
);
reg bdf;
initial bdf = 16'h0200;
always @(posedge core_clk_out) begin
cfg_clock <= cfg_clock + 1;
if(cfg_addr == 4'hF) bdf <= {cfg_data, 3'b0}
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