Timer interrupt mode in qsys

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Timer interrupt mode in qsys

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Hi all,

when i am trying to configure IOWR_ALTERA_AVALON_TIMER_CONTROL register

IOWR_ALTERA_AVALON_TIMER_CONTROL(TIMER_0_BASE,0X7);

then control register is not getting written..

what to do...kindly help how to configure timer....configured in custom mode....20ms....timer....IRQ enabled

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