Hello! Can you help me with a two 4-bit vectors divider for fpga

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Hello! Can you help me with a two 4-bit vectors divider for fpga

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What I need is a divider which has as operands two 4-bit vectors(bit_vector(3 downto 0) or std_logic_vector(3 downto 0)).

I only have to display integer results without '.' and what's after.

Please give me some code. I am a rookie in this. I need it for a project at college.

I've only been studying VHDL for at most a couple of months and I don't know to much.

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