Does clCreateProgramWithBinary really load kernels onto FPGA with 13.0 SDK ?

[Altera_Forum]

Hello friends, 

 One of the main evolution brought to the last release of Altera SDK for OpenCL is to load kernels onto FPGA using Quartus CvP when calling the clCreateProgramWithBinary in the host code.   When performing a step by step debugging (with VS2010), I noticed CvP does not launch with clCreateProgramWithBinary, but with clEnqueueNDRangeKernel. Is that normal ?; or is it a bug ?  Cheers

[Altera_Forum]

Yes this is expected; however, you should only see this occur when the kernel image is not already present in the FPGA. So if you have a host application that continuously runs the same kernel over and over you should see the FPGA become configured for the first kernel enqueue operation and not for the rest of the subsequent kernel enqueue operations. If there are buffers allocated in the FPGA when the CvP operation occurs then they are copied back, the hardware is configured, and then the buffers are restored that way you don't loose any data stored in global memory while the FPGA is being reconfigured. 

 Since these extra buffer movements factor into overhead (much lower than the overhead of configuring the FPGA) here are some tips to minize it:  1) If you have multiple kernels try to squeeze them into a single FPGA image by compiling them all from a single .cl file. This will avoid having to reconfigure the FPGA when switching between kernels.  2) If# 1 is not possible and you need to have seperate kernels in seperate FPGA images then if possible try to run multiple NDRanges across one kernel followed by multiple NDRanges across the second kernel, etc.... This way you get more work done before having to swap out the hardware  3) Any time you are done with a buffer, delete it. That way if an FPGA reconfiguration occurs you'll limit the number of buffers live in the FPGA that need to be temporarily copied to the host and restored back to the FPGA have the configuration is complete.

[Altera_Forum]

Thanks you BadOmen ! However for some designs CvP operation does not occur with the first clEnqueueNDRangeKernel but with the first clEnqueueReadBuffer . How can that be explained ?

[Altera_Forum]

The queue scheduling would be responsible for that. So it's not that CvP is triggered by you calling any enqueuing function, it's when the need to replace the FPGA exists that the FPGA becomes reconfigured using CvP. For example if data movements are still occuring you don't want the CvP to kick in and reprogram the FPGA so the scheduler determines when it is safe to do so. So if you are using breakpoints to see when CvP is getting called up it could be a bit misleading as to when operations are actually occuring. 

 In general I think of the command queue as an asynchronous scheduler that I have no control over. Commands like buffer movements and kernel invocations occur in order but I have no control over when each occurs in time.

[Altera_Forum]

Great BadOmen, thank you !