floating number with synthetisable vhdl code

[Altera_Forum]

Hi, 

I have to use floating number with my VHDL code wich wille be implemented in a de2 card so how can I use floating point?? I have seen that this method use number between (-128)et 127 if I have to use number over this interval biger then 127 what can I do?? thank you.

[Altera_Forum]

do you mean fixed point or floating point? fixed point is just integer arithmatic with an offset. floating point is usually 32 bits. ALtera provides floating point cores.

[Altera_Forum]

I mean floating point, witch is indicated in this link 

http://en.wikipedia.org/wiki/fast_inverse_square_root#overview_of_the_code !!???

[Altera_Forum]

Then you need to use the Altera floating point IP cores from the megawizard

[Altera_Forum]

yes but I want to use number bigger than 127 for example 200.5 or -241.2. so what can I do thank you

[Altera_Forum]

I dont know where you got this idea of limitation from - but Altera IP cores can go up to 32 bit floating point, meaning they can go from -3.4028234 × 10^38 to 3.4028234 × 10^38 

Thats a rather large range.

[Altera_Forum]

I have found it in the some link "The next 8 bits form the exponent, which is biased in order to result in a range of values from −128 to 127..." 

I will try with your idea thank you very much.

[Altera_Forum]

The range of values from −128 to 127 is for exponent part of your floating number, not the number itself. 

 I also head for synhtetisable floating point. I have found IEEE packages that work in ModelSim but not in Quartus yet (version <= 12.0sp1).

[Altera_Forum]

ok thank you very much mmTsuchi I haven't concentrate for this :) 

I have found also a package, hoping that will be synthetisable with quartus, I m working with 9.0 version  thank you

[Altera_Forum]

The '93 compatible versions of this library will work just fine in quartus. But you'll get some terrrible Fmax figures because there is no way to pipeline them.

[Altera_Forum]

can you explain more please, Tricky ??!! because I don't understand ""get some terrrible Fmax figures"" 

thanks

[Altera_Forum]

You cannout use the IEEE floating library very well in quartus, because your maximum clock speed would be very very slow (maybe 25MHz if you're lucky). The Altera FP cores are pipelined so speeds >300MHz should be possible.

[Altera_Forum]

ah ok I m working with 50 MHz frequency clock. 

there is an other way to present real number or I must use this FP core with less performance?? thanks

[Altera_Forum]

use the floating point cores from the megawizard